1. Field of the Invention
The present invention relates generally to interconnected processing systems, and more particularly, to processing systems that dynamically control I/O interface performance and power consumption.
2. Description of Related Art
Interfaces within and between present-day integrated circuits have increased in operating frequency and width. In particular, in multiprocessing systems, both wide and fast connections are provided between many processing units. Data width directly affects the speed of data transmission between systems components, as does the data rate, which is limited by the maximum frequency that can be supported by an interface. However, such fast and wide interconnects are significant power consumers in a computer system formed from interconnected processing units.
The data width and/or operating frequency of the interconnects may be scaled in order to reduce power consumption when an interface is expected to be idle or have reduced bandwidth requirements for a period of time. However, in order for both ends of an interface to operate properly without requiring re-initialization, communication of changes to the data width and/or operating frequency of the interconnects need to be communicated across the interface. Additional control lanes may be provided for such communications, but require additional hardware and consequent cost.
It is therefore desirable to provide a method for controlling the data width and/or operating frequency of interface physical link layers in a multi-processing system without requiring additional control lanes.